Product Summary

The MT48LC1M16A1TG-8AS is a high-speed CMOS, dynamic random-access memory containing 16,777,216 bits. The MT48LC1M16A1TG-7S is internally configured as a dual 512K x 16 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). The MT48LC1M16A1TG-8AS provides for programmable READ or WRITE burst lengths of 1, 2, 4 or 8 locations, or the full page, with a burst terminate option.

Parametrics

MT48LC1M16A1TG-8AS absolute maximum ratings: (1)Voltage on VDD, VDDQ Supply Relative to VSS:-1V to +4.6V; (2)Voltage on Inputs, NC or I/O Pins Relative to VSS:-1V to +4.6V; (3)Operating Temperature:-40℃ to +85℃; (4)Storage Temperature (plastic):-55℃ to +150℃; (5)Power Dissipation:1W.

Features

MT48LC1M16A1TG-8AS features: (1)PC100 functionality; (2)Fully synchronous; all signals registered on positive edge of system clock; (3)Internal pipelined operation; column address can be changed every clock cycle; (4)Internal banks for hiding row access/precharge 1 Meg x 16 - 512K x 16 x 2 banks architecture with 11 row, 8 column addresses per bank; (5)Programmable burst lengths: 1, 2, 4, 8 or full page; (6)Auto Precharge Mode, includes concurrent auto precharge; (7)LVTTL-compatible inputs and outputs; (8)Single +3.3V ±0.3V power supply; (9)Supports CAS latency of 1, 2 and 3; (10)Industrial temperature range: -40℃ to +85℃.

Diagrams

MT48LC1M16A1TG-8AS circuit diagram

MT48FN
MT48FN
Switchcraft
Patch Panels PATCHBAY
Data Sheet
Negotiable 
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MT48FNX
Switchcraft
Patch Panels PATCHBAY
Data Sheet
0-1: $161.67
1-10: $159.65
10-25: $155.42
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MT48H16M16LF
Other

Data Sheet
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Data Sheet
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Data Sheet
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MT48H16M16LFBF-75 AT:G TR
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Data Sheet
Negotiable